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Sr. Engineer - ASIC Chip/Block Physical Designer #19000071 San Jose , CA 95134 Posted: 09/08/2020 Employment Type: Direct Placement Category: Semiconductor Processors Job Number: 87039 Job Description We are looking for a Sr. Engineer in ASIC Chip/Block Physical Design for a client of ours San Jose, CA. You ll be a chip/block designer, who will do hands-on physical design takes for top-level SO...
Mountain View , California , United States | testing | Contract Develop block level test plan, UVM test bench components such as agents(drivers/monitors), scoreboard, constrained random testcases based on UVM sequences, assertions. Develop and close functional coverage, code coverage. Ability to independently execute on test plan, run simulations and debug. Required: 7+ years of ASIC verificati...
EDELBROCK BIG BLOCK CHEVY NEW CHROME VALVE COVER SET FOR 1965 AND UP 396-454 VERY NICE NEW IN THE BOX #4480 THANKS MIKE D R ENGINES 510 226-6299
FORD 1978 HEAVY DUTY 390 TRUCK BLOCK - D4TE - 30 OVER BORE @ 4.08 THIS IS A 501 SERIES BLOCK THAT REPLACED THE FORD 352 SERIES ENGINE BLOCK, ALSO KNOWN AS FORD FE BLOCKS. THIS BLOCK IS ALSO KNOWN AS A MIRROR 105 BLOCK BECAUSE THE 501 WAS CAST BACKWARDS SO IT LOOKS LIKE A 105 RATHER THAN A 501. THE 1979 BLOCKS DATED LATE 1978 - 1979 WHICH WAS THE LAST YEAR OF PRODUCTION DID NOT SHOW THE BACKWARD...
FOR SALE IS A 1974 FORD HEAVY DUTY MIRROR 105 390 TRUCK BLOCK WITH A CLEAN 4.05 STANDARD BORE CASTING NUMBER - D3TE DATE - 4A30 - JANUARY 30, 1974 HERE ARE THE DETAILS THE BLOCK HAS BEEN BAKED AND SHOT PEENED TO REMOVE ALL CONTAMINANTS, PAINT AND ALL HEAVY RUST. MAGNAFLUXED GOOD INCLUDES ORIGINAL MAIN CAPS AND BOLTS REINFORCED MAINS LIKE A 428CJ OR 427 BLOCK ALL CLEAR COATED ON THE EXTERIOR SUR...
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Applications will be accepted through October 6, 2021. Minimum qualifications: + Bachelor's degree in Computer Science, related technical field, or equivalent practical experience. + 20 years of professional experience, including 15 years as an engineering leader with experience building scalable systems. + Experience in a cross-functional engineering environment. + Experience providing technic...
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Minimum qualifications: + Master's degree in Electrical Engineering, Computer Engineering, Physics, related discipline or equivalent practical experience. + 4 years of circuit design industry experience. + Experience in schematic entry, layout, physical verification, SPICE simulations, and writing automation scripts. + Experience in high performance and low power circuit techniques in advanced ...
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A Senior IC Layout Designer IV job with a leading Technology Company located in South San Jose is available courtesy of Modis Engineering. A senior layout designer will be responsible for the layout of high performance analog cores such as amplifiers, buffers, comparators, regulators, analog-to-digital and digital-to-analog converters, PLL, etc. Senior IC Layout Designer IV job responsibilities...
Applications will be accepted through October 2nd, 2021. Minimum qualifications: + Bachelor s degree or equivalent practical experience leading strategic and operational initiatives. + 15 years of professional experience, including 10 years of experience in a similar role or in Management Consulting, Corporate Development, Product Management, Engineering, Operations of a technical team. + Exper...
Applications will be accepted through September 29th Minimum qualifications: + Bachelor s degree in Computer Science, Electrical Engineering and/or equivalent practical experience. + 15 years of professional experience, including 10 years of experience developing commercial products, developer tools or distributed infrastructure. + Experience with C, Java, C++ or go. Preferred qualifications: +...
Title Physical Design Engineer (Sr.) Locations Santa Clara, CA Duration Fulltime Details Responsibilities Participate and Provide inputs for large networking chips Physical Design Methodology Work on Blocks with IO, PLL and Efuse macros and take it through complete signoff Work on closing final DRCs, manually or with scripts Work on AP routing for complete chip Manage chip level integration and...
**VOLKSWAGEN CERTIFIED PRE-OWNED!!**, **CARFAX 1-OWNER VEHICLE!!**, **BUMPERDILLO, EXTENDED RANGE REMOTE START!!**, **MONSTER MATS**, **TRUNK LINER**, CarGo BLOCKS**, **ALL-WHEEL DRIVE!!**, **4-MOTION AWD SYSTEM!!**, **PREMIUM PACKAGE!!**, **VOLKSWAGEN APP-CONNECT SYSTEM!!**, **SMARTPHONE INTEGRATION SYSTEM!!**, **APPLE CARPLAY & ANDROID AUTO!!**, **REMOTE ENGINE START!!**, **LED HEADLIGHTS & T...
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group > ASICS Engineering General Summary This position involves designing and implementing Low-power, High Performance, area-efficient embedded memory (CPUL1/L2, SRAM, register files, etc.) circuits and architectures. This position is open to candidates that are interested in working in San Diego, San Jose, or Austin, ...
Primary Skills: Pre-silicon Design Verification, System Verilog and UVM Duration: 18+ months Location: CA Minimum Requirements: (Must have Qualifications) At least 4 years of experience with pre-silicon DV (Design Verification) Must have hands-on experience with writing code using System Verilog and UVM over the past 2 years Must be a quick learner, independent and communicate well. Knowledge a...
Requisition Number: 168059 Position Title: Software Engineer III External Description: The EA Digital Platform (EADP) organization provides central services that help game teams to tap into the power of the global EA ecosystem. Compatible across multiple platforms and devices, our platform empowers teams to foster deeper, more meaningful relationships with our players. The EADP is the foundatio...
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